Delay for asynchronous page mode sequential accesses for EMC_CS0.
WAITPAGE | Asynchronous page mode read after the first read wait states. Number of wait states for asynchronous page mode read accesses after the first read: 0x0 - 0x1E = (n+ 1) CCLK cycle read access time. For asynchronous page mode read for sequential reads, the wait state time for page mode accesses after the first read is (WAITPAGE + 1) x tCCLK. 0x1F = 32 CCLK cycle read access time (POR reset value). |
RESERVED | Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined. |